Well,
I recently built myself a project that had featured in the Oct/Nov 2019 issues of Practical Electronics (previously Everyday Practical Electronics). It is a new fangeld GPS-synced Frequency Reference.
It uses a CDCE906PWG4 from Texas Instruments as its core component which allows three independent outputs to be set over a wide frequency range.
It also uses a thingamabob called the Micromite Backpack - which is basically a microprocessor with a nice colour touch screen integrated that is designed to use MMBasic as its programming language.
The theory of operation is very simple, there is a 40MHz ovened variable oscillator and also an external GPS 1pps signal. The microprocessor counts the 40MHz signal between 1 second pulses from the GPS and adjusts the voltage control on the oscillator appropriately. Once we have an accurate 40MHz signal, this is then used by the PLL to create the reference outputs at the user selected frequency.
Unfortunately I can't get this thing to work (properly) and I **think** my fundamental problem is one of power filtering/decoupling.
Here are the basic components, the green board is the frequency reference and the red one the Micromite.
The white wires on the board you can see are a suggestion from the author "the stability of the reference may be improved by reducing the impedance of ground tracks on the PCB" which smells rather fishy to me.
Anyhow, the output of the oscillator from the PLL looks like this:
and the output, when set to 10MHz looks like this:
All looking rather nasty - wouldn't you agree? The bursts of apparent crap on the signal are when the GPS is sending data to the processor.
I've tried to get some support for this project; but failed rather dismally. There used to be a chat room for EPE projects, but that has been closed. There is a dedicated forum now, here:
https://www.eeweb.com/forum/category/epe-magazine
but I posted there over a week ago, was notified that my post is subject to moderation, but it still hasn't appeared. I also note the last post there is over a month ago.
All of the self tests in the software appear to pass; that suggests all is well, but I can assure you that all is not well at all! The output frequency is a mile from being accurate, the "approx freq" in the screen above swings wildly around the 40MHz target suggesting the processor is having issues counting the clock, and generally it's all a bit pants.
Not sure what to try next.
This makes me sad.
I even ended up digging out a CD4046 to remind myself how PLLs work,
In the image above, we have the source oscillator from my desk function generator in yellow, the light blue is the output from the on-chip VCO, the purple is the basic comparator (type 1) output and the darker blue the type 2 comparator output. When I change the frequency of the bench generator the on-chip VCO follows in frequency and locks - just as it should - I remember now!
Alan Wolke, W2AEW, has a superb video explaining this stuff on YouTube here.
This, however, makes me very happy as it is our very beautiful Pepper Cat enjoying a bit of late winter sun:
Local conditions.
I recently built myself a project that had featured in the Oct/Nov 2019 issues of Practical Electronics (previously Everyday Practical Electronics). It is a new fangeld GPS-synced Frequency Reference.
It uses a CDCE906PWG4 from Texas Instruments as its core component which allows three independent outputs to be set over a wide frequency range.
It also uses a thingamabob called the Micromite Backpack - which is basically a microprocessor with a nice colour touch screen integrated that is designed to use MMBasic as its programming language.
The theory of operation is very simple, there is a 40MHz ovened variable oscillator and also an external GPS 1pps signal. The microprocessor counts the 40MHz signal between 1 second pulses from the GPS and adjusts the voltage control on the oscillator appropriately. Once we have an accurate 40MHz signal, this is then used by the PLL to create the reference outputs at the user selected frequency.
Unfortunately I can't get this thing to work (properly) and I **think** my fundamental problem is one of power filtering/decoupling.
Here are the basic components, the green board is the frequency reference and the red one the Micromite.
The white wires on the board you can see are a suggestion from the author "the stability of the reference may be improved by reducing the impedance of ground tracks on the PCB" which smells rather fishy to me.
Anyhow, the output of the oscillator from the PLL looks like this:
and the output, when set to 10MHz looks like this:
I've tried to get some support for this project; but failed rather dismally. There used to be a chat room for EPE projects, but that has been closed. There is a dedicated forum now, here:
https://www.eeweb.com/forum/category/epe-magazine
but I posted there over a week ago, was notified that my post is subject to moderation, but it still hasn't appeared. I also note the last post there is over a month ago.
All of the self tests in the software appear to pass; that suggests all is well, but I can assure you that all is not well at all! The output frequency is a mile from being accurate, the "approx freq" in the screen above swings wildly around the 40MHz target suggesting the processor is having issues counting the clock, and generally it's all a bit pants.
Not sure what to try next.
This makes me sad.
I even ended up digging out a CD4046 to remind myself how PLLs work,
In the image above, we have the source oscillator from my desk function generator in yellow, the light blue is the output from the on-chip VCO, the purple is the basic comparator (type 1) output and the darker blue the type 2 comparator output. When I change the frequency of the bench generator the on-chip VCO follows in frequency and locks - just as it should - I remember now!
Alan Wolke, W2AEW, has a superb video explaining this stuff on YouTube here.
This, however, makes me very happy as it is our very beautiful Pepper Cat enjoying a bit of late winter sun:
Local conditions.
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